Decoupling Capacitor Placement: The Physics of “Put It Closer”
Decoupling capacitors are local energy reservoirs. Their entire value is loop area. A perfect capacitor a centimetre away performs worse than an adequate one at the pin. Placement is not finishing touch it is the design.
> At a glance: 7 minute guide · part 7 of 10 in the PCB design complete guide track · includes a worked example and a quick-reference table.
## The local reservoir job
Here is the working theory in one pass. When an IC switches, it draws current in nanosecond bursts. The regulator cannot respond that fast and trace inductance strangles delivery. The local cap supplies the transient, then recharges slowly. Larger bulk caps (10 µF class) refuel the small ones.
| Capacitor | Value | Serves | Placement |
| — | — | — | — |
| Ceramic | 100 nF | Switching transients | At the pin, ≤ 5 mm |
| Ceramic/bulk | 1–10 µF | Slower local sag | Per IC cluster |
| Electrolytic | 47 µF+ | Board-level reserve | Power entry |
| Tantalum/poly | 10–100 µF | Bulk on compact boards | Regulator output |
## Value stacks and why
A classic 100 nF + 10 µF pair covers two frequency decades. Ceramic for fast edges, bulk for slower sag. Antiresonance between values exists but is secondary to placement a correctly placed pair beats an exotic single part any day.
## Placement geometry
Capacitor to power pin, capacitor to ground via: both paths short and wide. Vias beside (not in) pads when hand-soldering, in pads when the fab fills them. One cap per power pin for fast ICs. Sharing caps between neighbouring ICs reintroduces exactly the coupling decoupling prevents.
## How to apply this in your build
Work through the sequence below each step assumes the previous one passed. For numbers that need calculating, the linked tools at the end of this guide do the arithmetic instantly.
1. Place the fastest capacitor closest to each power pin
2. Drop the ground via immediately beside the capacitor
3. Add bulk capacitance at the regulator and board entry
4. Audit layout: every IC power pin within 5 mm of its cap
### Worked example
A microcontroller resetting during WiFi transmit had its 100 nF “conveniently” grouped 20 mm away. Moving the caps to the pin pair eliminated the brownout entirely same BOM, different geometry. Run the numbers yourself with the Capacitor Code (3-Digit) and the result should agree to within rounding.
> Practical note from the bench. Layout reviews on Procirel boards always zoom to each IC power pin if the cap is not visibly attached, the review stops there.
## Common mistakes to avoid
– Grouping all decoupling at the board edge “neatly”
– Sharing one capacitor between two ICs
– Tiny 0402 caps far away “because they fit there”
## Key takeaways
– The local reservoir job the foundation of this guide; revisit it if any measurement here surprises you.
– Value stacks and why the foundation of this guide; revisit it if any measurement here surprises you.
– Placement geometry the foundation of this guide; revisit it if any measurement here surprises you.
## Who this guide is for
Beginners get a single focused topic instead of a whole textbook chapter. It assumes the track’s earlier pages in the PCB design complete guide path. Intermediate readers use it as a reference the table, the worked example and the mistake list answer the questions that come up mid-build. If you teach, the structure (theory, application, example, failure modes) maps cleanly onto a lab session.
## What you need before starting
Nothing exotic: the parts or tools named in the guide, a multimeter. The Capacitor Code (3-Digit) / RC Time Constant open in a tab. Place the fastest capacitor closest to each power pin before you begin the guide assumes it and keep the quick-reference table above within sight while you work through the steps.
### Quick reference card
| Aspect | Where to find it in this guide |
| — | — |
| Core theory | The local reservoir job |
| Application steps | How to apply this in your build |
| Worked numbers | Worked example |
| Failure modes | Common mistakes to avoid |
## How this fits the PCB design complete guide track
This guide is one stop in the structured learning path. Start from the [PCB design complete guide](/tutorial/pcb-design-complete-guide) pillar page for the full map, or continue with [layout best practices](/tutorial/pcb-layout-best-practices) and [assembly defect guide](/tutorial/pcb-assembly-defects). For the arithmetic, open the [Capacitor Code (3-Digit)](/tools/capacitor-code) or [RC Time Constant](/tools/rc-time-constant).
## Frequently asked questions
Is more capacitance always better?
Beyond covering the decades, extra bulk slows regulator response and inrush value stack beats dumping capacitance.
X7R or C0G for decoupling?
X7R for the bulk of decoupling duty; C0G reserved where linearity and losses matter (RF, timing).
Is there a calculator for this?
Yes the [Capacitor Code (3-Digit)](/tools/capacitor-code) and [RC Time Constant](/tools/rc-time-constant) tools run the formulas from this guide instantly, client-side, with no signup.
## Related guides and tools
– The complete pcb design guide: [PCB Design complete guide](/tutorial/pcb-design-complete-guide)
– Read next: [rf pcb layout: rules for wifi, lora and beyond](/tutorial/rf-pcb-layout-guide)
– Also in this track: [what is vlsi design?
– Continue with: [kicad schematic capture: clean beginnings](/tutorial/kicad-schematic-tutorial)
– Calculate as you go: [PCB trace width calculator](/tools/pcb-trace-width) · [resistor value decoder](/tools/resistor-color-code) · [SMD code decoder](/tools/smd-resistor-code)
– From here, the natural continuation is the next guide in the track index. It assumes exactly the vocabulary this page built and adds the next layer of practice.
## Verification routine
Component substitution is a legitimate experiment as long as it is deliberate. Swap one part, predict the effect, measure, and record. That single habit converts a parts bin into a teaching lab and makes every future guide in this track faster to absorb.
The fastest way to internalise this topic is to change one variable deliberately and predict the result before measuring. Wrong predictions are the curriculum, they show exactly which mental model needs revisiting, and the bench grades honestly.
## Formulas and checks from this guide
Verification checklist for this track: run DRC early and often, verify footprints against the datasheet drawing. Walk the return path of every fast signal before ordering. A five-minute Gerber preview has saved more fab cycles than any other habit.
Bookmark this page against your next build in the track. The checklist above is the same one used across 15 guides in this series.
## Notes from the bench
Two for hobby density, four the moment ground integrity or impedance matters. The cost gap has collapsed.
Run DRC continuously, then once more after every final edit. The last small change breaks the most boards.
Procirel