PCB Vias: Through, Blind and Buried Types and Trade-offs

Vias are drilled, plated tunnels connecting layers. The humble through-via solves most problems; blind and buried vias buy density at real cost. Choosing deliberately keeps boards manufacturable and cheap.
> At a glance: 6 minute guide · part 6 of 10 in the PCB design complete guide track · includes a worked example and a quick-reference table.

## The three families

Through-vas pass the whole board cheap, inspectable, universal. Blind vias join an outer layer to an inner one without emerging; buried vias connect inner layers only. Both need extra process steps and stricter fab capability, priced accordingly.

| Type | Connects | Relative cost | Use when |
| — | — | — | — |
| Through | All layers | Baseline | Default choice |
| Blind | Outer ↔ inner | ++ | Dense BGA areas |
| Buried | Inner ↔ inner | ++ | High-density multilayer |
| Via-in-pad | Pad to plane | + (fill/cap) | BGA pitch constraints |
| Stitching | Plane to plane | Baseline | Return paths, thermal |

## Via electrical reality

A via has resistance (~0. 5–1 mΩ typical small drill) and inductance (~0. 5–1 nH) negligible for logic, meaningful for power and fast edges. Current capacity per via is modest; power transitions use arrays. Stitch vias tightly to signal transition vias to keep return paths short.

## Practical choices

Default to through-vias and smaller drills (0. 2/0. 4 mm) for density. Use via-in-pad (filled and capped) only where BGA escape demands it. A fanout discipline every IC power pin gets its via immediately prevents late routing congestion.

## How to apply this in your build

Work through the sequence below each step assumes the previous one passed. For numbers that need calculating, the linked tools at the end of this guide do the arithmetic instantly.
1. Prefer through-vias unless density genuinely demands more
2. Fan out power and ground vias immediately at each IC
3. Array vias for current instead of enlarging single drills
4. Keep return-stitch vias near signal transition vias

### Worked example

A 4 A rail transitioned layers through one 0. 4 mm via warm to the touch. Six vias in a ring dropped the junction to ambient rise by more than half, measurable by IR camera. Run the numbers yourself with the PCB Trace Width and the result should agree to within rounding.

> Practical note from the bench. Our routing reviews always ask two via questions: does power transition on an array, and does every layer-change signal have a nearby return path?

## Pitfalls that cost real hardware

– Single undersized vias on power nets
– Blind vias on a board that a through-via route could have solved
– Untented vias under wave-soldered SMD pads wicking solder

## Key takeaways

– The three families the foundation of this guide; revisit it if any measurement here surprises you.
– Via electrical reality the foundation of this guide; revisit it if any measurement here surprises you.
– Practical choices the foundation of this guide; revisit it if any measurement here surprises you.

## Prerequisites and preparation

Before starting: prefer through-vias unless density genuinely demands more and fan out power and ground vias immediately at each ic. Keep the [PCB Trace Width](/tools/pcb-trace-width) open every number in the worked example is reproducible. Total time including the bench steps: about 6–6 minutes.

## Who benefits most

Hobbyists meeting this topic for the first time, students who want the version with real numbers instead of abstract symbols, and returning engineers refreshing a corner of the craft. The mistake list alone justifies the visit every entry in it was learned the expensive way.

### Quick reference card

| Aspect | Where to find it in this guide |
| — | — |
| Core theory | The three families |
| Application steps | How to apply this in your build |
| Worked numbers | Worked example |
| Failure modes | Pitfalls that cost real hardware |

## How this fits the PCB design complete guide track

This guide is one stop in the structured learning path. Start from the [PCB design complete guide](/tutorial/pcb-design-complete-guide) pillar page for the full map, or continue with [trace width sizing](/tutorial/pcb-trace-width-guide) and [return path design](/tutorial/ground-planes-return-paths). For the arithmetic, open the [PCB Trace Width](/tools/pcb-trace-width).

## Frequently asked questions

Do via fences really help EMI?
Stitching return current paths yes, when placed where signals cross; scattered decoratively, they do nothing.

What is via tenting?
Solder mask sealing the via annular ring cheap, keeps probes and solder out.

Is there a calculator for this?
Yes the [PCB Trace Width](/tools/pcb-trace-width) tool runs the formulas from this guide instantly, client-side, with no signup.

## What to read after this

– The complete pcb design guide: [PCB Design complete guide](/tutorial/pcb-design-complete-guide)
– Read next: [rf pcb layout: rules for wifi, lora and beyond](/tutorial/rf-pcb-layout-guide)
– Also in this track: [what is vlsi design? building chips with billions of transistors](/tutorial/what-is-vlsi-design)
– Continue with: [kicad schematic capture: clean beginnings](/tutorial/kicad-schematic-tutorial)
– Calculate as you go: [PCB trace width calculator](/tools/pcb-trace-width) · [resistor value decoder](/tools/resistor-color-code) · [SMD code decoder](/tools/smd-resistor-code)
– From here, the natural continuation is the next guide in the track index: it assumes exactly the vocabulary this page built and adds the next layer of practice.

## Field notes

Component substitution is a legitimate experiment as long as it is deliberate. Swap one part, predict the effect, measure, and record. That single habit converts a parts bin into a teaching lab and makes every future guide in this track faster to absorb.

The fastest way to internalise this topic is to change one variable deliberately and predict the result before measuring. Wrong predictions are the curriculum, they show exactly which mental model needs revisiting, and the bench grades honestly.
## Formulas and checks from this guide

Verification checklist for this track: run DRC early and often, verify footprints against the datasheet drawing, and walk the return path of every fast signal before ordering. A five-minute Gerber preview has saved more fab cycles than any other habit.

Bookmark this page against your next build in the track: the checklist above is the same one used across 15 guides in this series.

## Field lessons worth keeping

Two for hobby density, four the moment ground integrity or impedance matters. The cost gap has collapsed.

Run DRC continuously, then once more after every final edit. The last small change breaks the most boards.

## The habit that makes this stick

A note on layout order, which decides most boards in this track: connectors, then ICs with decoupling, then critical routes, then fill. Reversing that order is how revisions multiply.

Working through The three familiesand Via electrical reality with that habit in mind takes minutes, and it is the difference between reading about this topic and owning it.